fix: keep duplicate pad numbers on one logical pin (#411) - #413
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Fixes tscircuit#411. When an EasyEDA footprint represents one logical pin with multiple physical pad geometries (e.g. C5656610's four polygon pads all numbered 3 — one GND terminal), convertEasyEdaJsonToCircuitJson passed every geometry independently to normalizePinLabels, which renumbered the later duplicates into synthetic pins (7/8/9). Downstream consumers then bound those shapes as separate unconnected pads. Pin labels are now normalized once per unique pad number, all duplicate geometries share the same logical pin hint, and only one source_port is emitted per logical pin. Snapshot updates: C2838502 / C2913206 / C51950748 (ESP32 modules whose thermal-pad geometries were previously renumbered into synthetic pins — they now correctly share the GND pin).
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@Abse2001 could you take a look at this one when you have a moment? Small and self-contained. Fixes #411. The official JLCPCB footprint for The fix groups geometries by pad number before normalizing, so duplicates stay on one logical pin. Test covers the real |
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Fixes #411.
Problem
When an EasyEDA footprint represents one logical pin with multiple physical pad geometries,
convertEasyEdaJsonToCircuitJsontreats every geometry as a separate logical pin: duplicate pad numbers are passed independently tonormalizePinLabels, which renumbers the later geometries into synthetic pins.On
C5656610(ICS-43434, pads numbered1,2,4,5,6,3,3,3,3):Downstream (tscircuit → KiCad) the synthetic pins previously became separate unconnected pads.
Fix
pinNhint.source_portper logical pin instead of one per geometry.Verification
tests/convert-to-soup-tests/duplicate-pad-numbers-411.test.tswith the C5656610 asset from the issue (fails onmainwith synthetic pins 7/8/9)pin54..pin61withpin49_alt1hints; they now correctly share the GND pin, which is visible in the diffs as the synthetic pins disappearingbunx tsc --noEmit/biome check— clean